Register Bit Definitions
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Figure 4-23. GPIO Port A Pullup Disable (GPAPUD) Registers
31 30 29 28 27 26 25 24
GPIO31 GPIO30 GPIO29 GPIO28 GPIO27 GPIO26 GPIO25 GPIO24
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
23 22 21 20 19 18 17 16
GPIO23 GPIO22 GPIO21 GPIO20 GPIO19 GPIO18 GPIO17 GPIO16
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
15 14 13 12 11 10 9 8
GPIO15 GPIO14 GPIO13 GPIO12 GPIO11 GPIO10 GPIO9 GPIO8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-1 R/W-1 R/W-1 R/W-1
7 6 5 4 3 2 1 0
GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0
R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1
LEGEND: R/W = Read/Write; R = Read only; - n = value after reset
Table 4-27. GPIO Port A Internal Pullup Disable (GPAPUD) Register Field Descriptions
Bits Field Value Description
(1)
31-0 GPIO31-GPIO0 Configure the internal pullup resister on the selected GPIO Port A pin. Each GPIO pin
corresponds to one bit in this register.
0 Enable the internal pullup on the specified pin. (default for GPIO12-GPIO31)
1 Disable the internal pullup on the specified pin. (default for GPIO0-GPIO11)
(1)
This register is EALLOW protected. See Section 5.2 for more information.
Figure 4-24. GPIO Port B Pullup Disable (GPBPUD) Registers
31 30 29 28 27 26 25 24
GPIO63 GPIO62 GPIO61 GPIO60 GPIO59 GPIO58 GPIO57 GPIO56
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
23 22 21 20 19 18 17 16
GPIO55 GPIO54 GPIO53 GPIO52 GPIO51 GPIO50 GPIO49 GPIO48
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
15 14 13 12 11 10 9 8
GPIO47 GPIO46 GPIO45 GPIO44 GPIO43 GPIO42 GPIO41 GPIO40
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
7 6 5 4 3 2 1 0
GPIO39 GPIO38 GPIO37 GPIO36 GPIO35 GPIO34 GPIO33 GPIO32
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; - n = value after reset
Table 4-28. GPIO Port B Internal Pullup Disable (GPBPUD) Register Field Descriptions
Bits Field Value Description
(1)
31-0 GPIO63- Configure the internal pullup resister on the selected GPIO Port B pin. Each GPIO pin
GPIO32 corresponds to one bit in this register.
0 Enable the internal pullup on the specified pin. (default)
1 Disable the internal pullup on the specified pin.
(1)
This register is EALLOW protected. See Section 5.2 for more information.
General-Purpose Input/Output (GPIO)100 SPRUFB0C – September 2007 – Revised May 2009
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