Texas Instruments TMS320x2833 series User Manual

INT1
to
INT12
INT14
28x
CPU
TINT2
TINT0
PIE
CPU-TIMER0
CPU-TIMER2
(ReservedforDSP/BIOS)
INT13
TINT1
CPU-TIMER1
XINT13
www.ti.com 32-Bit CPU Timers 0/1/2
Figure 3-20. CPU-Timer Interrupts Signals and Output Signal
A The timer registers are connected to the Memory Bus of the 28x processor.
B The timing of the timers is synchronized to SYSCLKOUT of the processor clock.
The general operation of the CPU-timer is as follows: The 32-bit counter register TIMH:TIM is loaded with
the value in the period register PRDH:PRD. The counter register decrements at the SYSCLKOUT rate of
the 28x. When the counter reaches 0, a timer interrupt output signal generates an interrupt pulse. The
registers listed in Table 3-18 are used to configure the timers.
Table 3-18. CPU-Timers 0, 1, 2 Configuration and Control Registers
Name Address Size (x16) Description Bit Description
TIMER0TIM 0x0C00 1 CPU-Timer 0, Counter Register Figure 3-21
TIMER0TIMH 0x0C01 1 CPU-Timer 0, Counter Register High Figure 3-22
TIMER0PRD 0x0C02 1 CPU-Timer 0, Period Register Figure 3-23
TIMER0PRDH 0x0C03 1 CPU-Timer 0, Period Register High Figure 3-24
TIMER0TCR 0x0C04 1 CPU-Timer 0, Control Register Figure 3-25
Reserved 0x0C05 1
TIMER0TPR 0x0C06 1 CPU-Timer 0, Prescale Register Figure 3-26
TIMER0TPRH 0x0C07 1 CPU-Timer 0, Prescale Register High Figure 3-27
TIMER1TIM 0x0C08 1 CPU-Timer 1, Counter Register Figure 3-21
TIMER1TIMH 0x0C09 1 CPU-Timer 1, Counter Register High Figure 3-22
TIMER1PRD 0x0C0A 1 CPU-Timer 1, Period Register Figure 3-23
TIMER1PRDH 0x0C0B 1 CPU-Timer 1, Period Register High Figure 3-24
TIMER1TCR 0x0C0C 1 CPU-Timer 1, Control Register Figure 3-25
Reserved 0x0C0D 1
TIMER1TPR 0x0C0E 1 CPU-Timer 1, Prescale Register Figure 3-26
TIMER1TPRH 0x0C0F 1 CPU-Timer 1, Prescale Register High Figure 3-27
TIMER2TIM 0x0C10 1 CPU-Timer 2, Counter Register Figure 3-21
TIMER2TIMH 0x0C11 1 CPU-Timer 2, Counter Register High Figure 3-22
TIMER2PRD 0x0C12 1 CPU-Timer 2, Period Register Figure 3-23
TIMER2PRDH 0x0C13 1 CPU-Timer 2, Period Register High Figure 3-24
TIMER2TCR 0x0C14 1 CPU-Timer 2, Control Register Figure 3-25
Reserved 0x0C15 1
TIMER2TPR 0x0C16 1 CPU-Timer 2, Prescale Register Figure 3-26
TIMER2TPRH 0x0C17 1 CPU-Timer 2, Prescale Register High Figure 3-27
SPRUFB0C – September 2007 – Revised May 2009 Clocking 61
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Texas Instruments TMS320x2833 series Specifications

General

Brand	Texas Instruments
Model	TMS320x2833 series
Category	Controller
Language	English