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Register Bit Definitions
Table 4-25. GPIO Port B Direction (GPBDIR) Register Field Descriptions
Bits Field Value Description
(1)
31-0 GPIO63-GPIO32 Controls direction of GPIO pin when GPIO mode is selected. Reading the register returns the
current value of the register setting
0 Configures the GPIO pin as an input. (default)
1 Configures the GPIO pin as an output
(1)
This register is EALLOW protected. See Section 5.2 for more information.
Figure 4-22. GPIO Port C Direction (GPCDIR) Register
31 24
Reserved
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
23 22 21 20 19 18 17 16
GPIO87 GPIO86 GPIO85 GPIO84 GPIO83 GPIO82 GPIO81 GPIO80
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
15 14 13 12 11 10 9 8
GPIO79 GPIO78 GPIO77 GPIO76 GPIO75 GPIO74 GPIO73 GPIO72
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
7 6 5 4 3 2 1 0
GPIO71 GPIO70 GPIO69 GPIO68 GPIO67 GPIO66 GPIO65 GPIO64
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; - n = value after reset
Table 4-26. GPIO Port C Direction (GPCDIR) Register Field Descriptions
Bits Field Value Description
(1)
31-0 GPIO87-GPIO64 Controls direction of GPIO pin when GPIO mode is selected. Reading the register returns the
current value of the register setting
0 Configures the GPIO pin as an input. (default)
1 Configures the GPIO pin as an output
(1)
This register is EALLOW protected. See Section 5.2 for more information.
The pullup disable (GPxPUD) registers allow you to specify which pins should have an internal pullup
resister enabled. The internal pullups on the pins that can be configured as ePWM
outputs(GPIO0-GPIO11) are all disabled asynchronously when the external reset signal ( XRS) is low. The
internal pullups on all other pins are enabled on reset. When coming out of reset, the pullups remain in
their default state until you enable or disable them selectively in software by writing to this register. The
pullup configuration applies both to pins configured as I/O and those configured as peripheral functions.
SPRUFB0C – September 2007 – Revised May 2009 General-Purpose Input/Output (GPIO) 99
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