Chapter 1
SPRUFB0C – September 2007 – Revised May 2009
Flash and OTP Memory Blocks
This chapter describes the proper sequence to configure the wait states and operating mode of flash and
one-time programmable (OTP) memories. It also includes information on flash and OTP power modes and
how to improve flash performance by enabling the flash pipeline mode.
Topic .................................................................................................. Page
1.1 Flash and OTP Memory .............................................................. 16
1.2 Flash and OTP Power Modes ...................................................... 16
1.3 Flash and OTP Registers ........................................................... 21
SPRUFB0C – September 2007 – Revised May 2009 Flash and OTP Memory Blocks 15
Submit Documentation Feedback
To Next Page
Loading...