GPIO and Peripheral Multiplexing (MUX)
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Table 4-9. GPIOA MUX
Default at Reset
Primary I/O Function Peripheral Selection Peripheral Selection 2 Peripheral Selection 3
GPAMUX1 Register
(GPAMUX1 bits = 00) (GPAMUX1 bits = 01) (GPAMUX1 bits = 10) (GPAMUX1 bits = 11)
Bits
1-0 GPIO0 EPWM1A (O) Reserved
(1)
Reserved
(1)
3-2 GPIO1 EPWM1B (O) ECAP6 (I/O) MFSRB (I/O)
(1)
5-4 GPIO2 EPWM2A (O) Reserved
(1)
Reserved
(1)
7-6 GPIO3 EPWM2B (O) ECAP5 (I/O) MCLKRB (I/O)
(1)
9-8 GPIO4 EPWM3A (O) Reserved
(1)
Reserved
(1)
11-10 GPIO5 EPWM3B (O) MFSRA (I/O) ECAP1 (I/O)
13-12 GPIO6 EPWM4A (O) EPWMSYNCI (I) EPWMSYNCO (O)
15-14 GPIO7 EPWM4B (O) MCLKRA (I/O) ECAP2 (I/O)
17-16 GPIO8 EPWM5A (O) CANTXB (O) ADCSOCAO (O)
19-18 GPIO9 EPWM5B (O) SCITXDB (O) ECAP3 (I/O)
21-20 GPIO10 EPWM6A (O) CANRXB (I) ADCSOCBO (O)
23-22 GPIO11 EPWM6B (O) SCIRXDB (I) ECAP4 (I/O)
25-24 GPIO12 TZ1 (I) CANTXB (O) MDXB (O)
27-26 GPIO13 TZ2 (I) CANRXB (I) MDRB (I)
29-28 GPIO14 TZ3/ XHOLD (I) SCITXDB (O) MCLKXB (I/O)
31-30 GPIO15 TZ4/ XHOLDA (O) SCIRXDB (I) MFSXB (I/O)
GPAMUX2 Register
(GPAMUX2 bits = 00) (GPAMUX2 bits = 01) (GPAMUX2 bits = 10) (GPAMUX2 bits = 11)
Bits
1-0 GPIO16 SPISIMOA (I/O) CANTXB (O) TZ5 (I)
3-2 GPIO17 SPISOMIA (I/O) CANRXB (I) TZ6 (I)
5-4 GPIO18 SPICLKA (I/O) SCITXDB (O) CANRXA (I)
7-6 GPIO19 SPISTEA (I/O) SCIRXDB (I) CANTXA (O)
9-8 GPIO20 EQEP1A (I) MDXA (O) CANTXB (O)
11-10 GPIO21 EQEP1B (I) MDRA (I) CANRXB (I)
13-12 GPIO22 EQEP1S (I/O) MCLKXA (I/O) SCITXDB (O)
15-14 GPIO23 EQEP1I (I/O) MFSXA (I/O) SCIRXDB (I)
17-16 GPIO24 ECAP1 (I/O) EQEP2A (I) MDXB (O)
19-18 GPIO25 ECAP2 (I/O) EQEP2B (I) MDRB (I)
21-20 GPIO26 ECAP3 (I/O) EQEP2I (I/O) MCLKXB (I/O)
23-22 GPIO27 ECAP4 (I/O) EQEP2S (I/O) MFSXB (I/O)
25-24 GPIO28 SCIRXDA (I) XZCS6 (O) XZCS6 (O)
27-26 GPIO29 SCITXDA (O) XA19 (O) XA19 (O)
29-28 GPIO30 CANRXA (I) XA18 (O) XA18 (O)
31-30 GPIO31 CANTXA (O) XA17 (O) XA17 (O)
(1)
The word "Reserved" means that there is no peripheral assigned to this GPxMUX1/2 register setting. Should it be selected, the
state of the pin will be undefined and the pin may be driven. This selection is a reserved configuration for future expansion.
General-Purpose Input/Output (GPIO)80 SPRUFB0C – September 2007 – Revised May 2009
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