TransCore Amtech IT2200 - Page 191

Connector Pin-outs
E-7
B14 IOR_L Input I/O read
B15 DAK3_L Input DMA acknowledge 3
B16 DRQ3 Output DMA request 3
B17 DAK1_L Input DMA acknowledge 1
B18 DRQ1 Output DMA request 1
B19 REFRESH_L Input/output DRAM refresh control
B20 BCLK Input Bus clock
B21 IRQ7 Output Interrupt request 7
B22 IRQ6 Output Interrupt request 6
B23 IRQ5 Output Interrupt request 5
B24 IRQ4 Output Interrupt request 4
B25 IRQ3 Output Interrupt request 3
B26 DAK2_L Input DMA acknowledge 2
B27 TC Input Terminal count
B28 BALE Input Bus address latch enable
B29 +5 VDC +5 volt power
B30 OSC Input System oscillator
B31 GND Ground
C1 SBHE_L Input System bus high enable
C2 LA23 Input Unlatched address, bit 23
C3 LA22 Input Unlatched address, bit 22
C4 LA21 Input Unlatched address, bit 21
C5 LA20 Input Unlatched address, bit 20
C6 LA19 Input Unlatched address, bit 19
C7 LA18 Input Unlatched address, bit 18
C8 LA17 Input Unlatched address, bit 17
C9 MRD_L Input Memory write
C10 MWT_L Input Memory read
Table E-3 ISA Bus Pin Definition (continued)
Pin Name Type Description