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Vigor VS Series - Page 407

Vigor VS Series
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401
RS D0 K5 D100 K10 K1
X20
D9101 the number
of data remaining
to be transferred
Data sending out
(TXD)
PLCPeripheral
Data received
(RXD)
PLC Peripheral
Ready for
receiving
End
of Text
4
3
2
1
0
4
3
2
1
5
0
S
m
D
n
Number of sending out data Bytes is designated by
m
n1
Divide the 16-bit data into two
Bytes of data: Upper 8 bits
data and Lower 8 bits data.
Start
of Text
A 16-bit data
Upper 8 bits
Lower 8 bits
Conditional contact
X20 to active the
instruction
Data sending out
request ag M9100
STX
D0
Upper 8 Bits
D1
Upper 8 Bits
D2
Lower 8 Bits
ETX
STX
ETX
D0
Lower 8 Bits
D1
Lower 8 Bits
D100
Upper 8 Bits
D101
Upper 8 Bits
D100
Lower 8 Bits
D101
Lower 8 Bits
End
of Text
Start
of Text
n
Number of received Bytes is designated by
Ready for
receiving
D9102 the number
of received data
The data receive
completed ag M9101
Reset by the program
Not reset by the
program
Description of Data Sending / Receiving (by the CP1): 16-bit Mode (M9161 = "OFF")
Either one of the condition below is completed will cause the receive completed ag M9101 “ON” and stop to
receive.
The number of assigned bytes is satised.
The End of Text is received.
The occurrence of Time-out.
1
2
3
n

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