Z8 Microcontrollers
Instruction Descriptions and Formats ZiLOG
12-28 UM001601-0803
DI
DISABLE INTERRUPTS
DI
Disable Interrupts
Dl
Instruction Format:
Operation:
IMR (7) <— 0
Bit 7 of Control Register FBH (the Interrupt Mask Register) is reset to 0. All interrupts are disabled, although they
remain “potentially” enabled. (For instance, the Global Interrupt Enable is cleared, but not the individual interrupt
level enables.)
Example:
If Control Register FBH contains 8AH (10001010) (interrupts IRQ1 and IRQ3 are enabled), the statement:
DI
Op Code: 8F
sets Control Register FBH to 0AH (00001010B) and disables these interrupts.
Flags: C: Unaffected
Z: Unaffected
S: Unaffected
V: Unaffected
D: Unaffected
H: Unaffected
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