ZiLOG Z8 User Manual

Z8 Microcontrollers
ZiLOG I/O Ports
UM001601-0803 5-27
5.8.3 COMPARATOR OPERATION
After enabling the Analog Comparator mode, P33 becomes a
common reference input for both comparators. The P33 (Ref) is
hard wired to the reference inputs to both comparators and can
-
not be separated. P31 and P32 are always connected to the posi-
tive inputs to the comparators. P31 is the positive input to com-
parator AN1 while P32 is the positive input to comparator AN2.
The outputs to comparators AN1 and AN2 are AN1-out and
AN2-out, respectively.
The comparator output reflects the relationship between the pos-
itive input to the reference input.
Example: If the voltage on AN1 is higher than the voltage on Ref
then AN1-out will be at a high state. If voltage on AN2 is lower
than the voltage on Ref then AN2-out will be at a Low state. In
this example, when the Port 3 register is read, Bits D1 = 1 and
D2 = 0. If the comparator outputs are enabled to come out on P34
and P37, then P34 = 1 and P37 = 0. Please note that the previous
data stored in P34 and P37 is not disturbed. Once the comparator
outputs are de-selected the stored values in the P34 and P37 reg
-
ister bits will be reflected on these pins again.
5.8.4 Interrupts
In the example from Section 5.8.3, P32 (AN2) will generate an
interrupt based on the result of the comparison being low and the
Interrupt Request Register (IRQ FAH) having bits D7=0 and
D6=0. If IRQ D7=1 and D6=0 then both P31 and P32 would
generate interrupts.
5.8.5 Comparator Definitions
5.8.5.1 V
ICR
The usable voltage range for both positive inputs and the refer-
ence input is called the common mode voltage range (V
ICR
). The
comparator is not guaranteed to work if the inputs are outside of
the V
ICR
range.
5.8.5.2 V
OFFSET
The absolute value of the voltage between the positive input and
the reference input required to make the comparator output volt
-
age switch is the input offset voltage (V
OFFSET
). If AN1 is 3.000V
and Ref is 3.001V when the comparator output switches states
then the Voffset = 1mV.
5.8.5.3 I
IO
For CMOS voltage comparator inputs, the input offset current
(I
IO
) is the leakage current of the CMOS input gate.
5.8.6 RUN Mode
P33 is not available as an interrupt input during Analog Mode.
P31 and P32 are valid interrupt inputs in conjunction with P33
(Ref) when in the Analog Mode.
P31 can still be used as T
IN
when the analog mode is selected. If
comparator outputs are desired to be outputted on the Port 3 out
-
puts, please refer to specific products specification for priority of
mixing when other special features are sharing those same Port
3 pins.
5.8.7 HALT Mode
The analog comparators are functional during HALT Mode if
the Analog Mode has been enabled. P31 and P32, in conjunction
with P33 (Ref) will be able to generate interrupts. Only P33 can
-
not generate an interrupt since the P33 input goes directly to the
Ref input of the comparators and is disconnected from the inter
-
rupt sensing circuits.
5.8.8 STOP Mode
The analog comparators are disabled during STOP Mode so it
does not use any current at that time. If P31, P32, or P33 are used
as a source for Stop-Mode Recovery, the Port 3 Digital Mode
must be selected by setting bit D1=0 in the Port 3 Mode Register.
Otherwise in STOP Mode, the P31, P32, and P33 cannot be
sensed. If the Analog Mode was selected when entering STOP
Mode, it will still be enabled after a valid SMR triggered reset.

ZiLOG Z8 Specifications

General

Brand	ZiLOG
Model	Z8
Category	Desktop
Language	English

Summary

Z8 MCU Product Overview

Z8 MCU Family Overview

Overview of the Z8 MCU product line, its applications, and packaging options.

Key Product Line Features

Details the core features of the Z8 MCU family, including registers, I/O, timers, and interrupts.

Z8 Address Space

Introduction to Address Spaces

Outlines the available address spaces for the Z8 MCU: register, program, and data memory.

Z8 MCU Standard Register File

Describes the structure, layout, and register map of the Z8 standard register file.

Z8 Expanded Register File (ERF)

Details the expansion of the register file into banks for additional features and peripherals.

Z8 Control and Peripheral Registers

Explains the standard and expanded registers governing CPU control and on-chip peripherals.

Program Memory Organization

Covers the reserved areas and organization of program memory, including interrupt vectors.

Z8 External Memory Interface

Describes the interface for accessing external program and data memory.

Z8 Stack Operations

Explains stack operations, location selection, and stack pointer management.

Z8 Clock System

Clock Circuitry and Frequency Control

Details the Z8 MCU's clock circuitry, sources, and frequency control mechanisms.

Clock Control and Modes

Explains software control of the internal system clock and divide-by-16 prescaler.

Oscillator Control and Operation

Covers software control of the oscillator for EMI and operation, including layout rules.

Oscillator Types: LC and RC

Explains the use of LC networks and RC oscillators for XTAL clock generation.

Z8 Reset and Watch-Dog Timer

Z8 MCU Reset Conditions

Covers Z8 MCU reset conditions, timing, and initialization procedures.

Reset Pin and Internal POR Operation

Details the hardware RESET pin and internal Power-On Reset operation.

Watch-Dog Timer (WDT) Functionality

Explains the WDT as a fail-safe mechanism for MCU resets.

Power-On Reset (POR) Circuit

Describes the timer circuit used for the Power-On Reset (POR) function.

Z8 I/O Ports and Configurations

Overview of Z8 I/O Ports

Overview of the Z8's I/O lines, grouping into ports, and general capabilities.

Port 0 Operation and Modes

Details the I/O operation of Port 0, including general I/O and handshake modes.

Port 1 Operation and Modes

Describes the I/O operation of Port 1, including general I/O and handshake modes.

Port 2 Operation and Modes

Explains the general I/O operation of Port 2 and its configurations.

Port 3 Functionality and Modes

Covers the unique structure and I/O capabilities of Port 3, including special functions.

Port Handshake Operation

Details how Ports 0, 1, and 2 use Port 3 for asynchronous data transfer handshake.

I/O Port Reset Conditions

Describes port register states and behavior after hardware, WDT, or POR resets.

Analog Comparators on Port 3

Explains the two on-chip analog comparators and their programming.

Open-Drain, Low EMI, and Auto Latches

Covers open-drain configuration, Low EMI mode, and auto latches for I/O protection.

Z8 Counter/Timers

Counter/Timer Introduction and Registers

Introduces the Z8 MCU's counter/timers, prescalers, and associated registers.

Counter/Timer Operation Modes

Explains how counter/timers are started, stopped, and controlled via Timer Mode Register.

Prescaler Operations and Modes

Details prescaler operations, count modes, and calculating time intervals.

Timer Output (TOUT) and Input (TIN) Modes

Describes TOUT modes for outputting timer states and TIN modes for external clocking.

Cascading Counter/Timers and Reset

Explains cascading counters for longer intervals and reset conditions.

Z8 Interrupt Handling

Interrupt Sources and Control Registers

Lists and describes interrupt sources and control registers (IRQ, IMR, IPR).

Interrupt Request Register Logic

Explains the logic and timing of the Interrupt Request (IRQ) register.

Interrupt Initialization Procedures

Covers the process of initializing interrupt priority, mask, and request registers.

Vectored and Polled Interrupt Processing

Explains vectored interrupt sequences and polled interrupt handling methods.

Z8 Power-Down Modes

HALT Mode Operation

Describes the HALT mode for reducing power consumption by suspending CPU clock.

STOP Mode Operation

Explains the STOP mode for lowest standby current by turning off clocks.

STOP-Mode Recovery Register (SMR)

Details the SMR register for configuring STOP-Mode Recovery sources and delays.

Z8 Serial I/O Interfaces

UART Introduction and Bit-Rate Generation

Introduces the UART for serial data and explains bit-rate generation.

UART Receiver Operation

Covers the UART receiver functionality, including shift register and data formats.

UART Transmitter Operation

Details the UART transmitter functionality, including parity and data formats.

UART Reset Conditions

Describes UART register states and behavior after reset.

Serial Peripheral Interface (SPI)

Introduces the SPI interface, pin configuration, and registers.

SPI Receive Status and Overrun

Explains SPI receive character available status and overrun conditions.

Z8 External Memory Interface

Introduction to External Interface

Overview of Z8 external memory interfacing capabilities and pins.

External Interface Pin Descriptions

Briefly describes pins associated with the Z8 MCU external memory interface.

External Addressing Configuration

Details how to configure ports for external addressing and memory mapping.

External Stacks and Data Memory

Explains Z8 stack operations in external memory and data memory addressing.

Bus Operation and Timing

Illustrates typical data transfers on the external bus and extended bus timing.

Instruction Timing

Shows typical instruction cycle timing for memory-fetched instructions.

Z8 Addressing Modes

Introduction to Addressing Modes

Introduces the six addressing modes provided by the Z8 microcontroller.

Register Addressing (R)

Explains 8-bit and 4-bit register addressing modes.

Indirect Register Addressing (IR)

Details indirect register addressing for accessing operands via registers.

Indexed Addressing (X)

Explains indexed addressing using a register offset for address calculation.

Direct Addressing (DA)

Describes direct addressing for specifying the next instruction address.

Relative Addressing (RA)

Covers relative addressing for jumps based on PC displacement.

Immediate Data Addressing (IM)

Explains immediate addressing where the operand is part of the instruction.

Z8 Instruction Set Details

Z8 Functional Summary of Instructions

Lists Z8 instructions grouped by function: Load, Arithmetic, Logical, etc.

Processor Flags and Status

Describes the Z8's status flags (Carry, Zero, Sign, Overflow, etc.) and their meanings.

Condition Codes for Jumps

Summarizes flag settings used for conditional jump instructions.

Instruction Notation and Binary Encoding

Explains the shorthand notation for operands, modes, and binary encoding.

Z8 Instruction Summary and Op Codes

Provides a summary of Z8 instructions with opcodes, cycles, and address modes.

Detailed Instruction Descriptions

Details the format, operation, flags, and examples for individual Z8 instructions.