Z8 Microcontrollers
Instruction Descriptions and Formats ZiLOG
12-40 UM001601-0803
LDC
LOAD CONSTANT
LDC
Load Constant
LDC dst, src
Instruction Format:
Operation:
dst <— src
This instruction is used to load a byte constant from program memory into a Working Register, or vice versa. The
address of the program memory location is specified by a Working Register Pair. The contents of the source operand
are not affected.
Example:
If Working Register Pair R6 and R7 contain the value 30A2H and program memory location 30A2H contains the
value 22H, the statement:
LDC R2, @RR6
Op Code: C2 26
loads the value 22H into Working Register R2. The value of program memory location 30A2H is unchanged by the
load.
Example:
If Working Register R2 contains the value 22H, and Working Register Pair R6 and R7 contains the value 10A2H,
the statement:
LDC @RR6, R2
Op Code: D2 26
loads the value 22H into program memory location 10A2H. The value of Working Register R2 is unchanged by the
load.
Note: This instruction format is valid only for MCUs which can address external program memory.
Cycles
OPC
Address Mode
(Hex)
dst src
12 D2 Irr r
12 C2 r Irr
OPC
OPC
dst src
src dst
Flags: C: Unaffected
Z: Unaffected
S: Unaffected
V: Unaffected
D: Unaffected
H: Unaffected
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