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ZiLOG Z8 - Page 190

ZiLOG Z8
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Z8 Microcontrollers
Instruction Descriptions and Formats ZiLOG
12-50 UM001601-0803
PUSH
PUSH
PUSH
Push
PUSH src
Instruction Format:
Operation:
SP <— SP - 1
@SP <— src
The contents of the SP (stack pointer) are decremented by one, then the contents of the source operand are loaded
into the location addressed by the decremented SP, thus adding a new element to the stack.
Note:
Address modes R or IR can be used to specify a 4-bit Working Register. In this format, the destination Working
Register operand is specified by adding 1110B (EH) to the high nibble of the operand. For example, if Working
Register R12 (CH) is the destination operand, then ECH will be used as the destination operand in the Op Code.
Example:
If the SP contains 1001H, the statement:
PUSH FCH
Op Code: 70 FC
stores the contents of Register FCH (the Flag Register) in location 1000H. After the PUSH operation, the SP
contains 1000H.
Example:
If the SP contains 61H and Working Register R4 contains FCH, the statement:
PUSH @R4
Op Code: 71 E4
stores the contents of Register FCH (the Flag Register) in location 60H. After the PUSH operation, the SP contains
60H.
OPC src
Cycles
OPC
(Hex)
Address Mode
dst
R
IR
10 Internal Stack
12 External Stack
10 Internal Stack
10 External Stack
70
71
Flags: C: Unaffected
Z: Unaffected
S: Unaffected
V: Unaffected
D: Unaffected
H: Unaffected

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