ZiLOG Z8

Z8 Microcontrollers
Table of Contents ZiLOG
Chapter Title and Subsections Page
vi UM001601-0803
Vectored Processing .................................................................................................................. 7-9
Vectored Interrupt Cycle Timing ........................................................................................ 7-11
Nesting of Vectored Interrupts ........................................................................................... 7-12
Polled Processing ..................................................................................................................... 7-12
Reset Conditions ...................................................................................................................... 7-12
Chapter 8. Power-Down Modes
Introduction ................................................................................................................................. 8-1
HALT Mode Operation ................................................................................................................ 8-1
STOP Mode Operation ............................................................................................................... 8-2
STOP-Mode Recovery Register (SMR) ...................................................................................... 8-3
Chapter 9. Serial I/O
UART Introduction ...................................................................................................................... 9-1
UART Bit-Rate Generation ......................................................................................................... 9-2
UART Receiver Operation .......................................................................................................... 9-4
Receiver Shift Register 9-4
Overwrites ............................................................................................................................ 9-5
Framing Errors ..................................................................................................................... 9-5
Parity .................................................................................................................................... 9-5
Transmitter Operation ................................................................................................................. 9-6
Overwrites ............................................................................................................................ 9-6
Parity .................................................................................................................................... 9-6
UART Reset Conditions ............................................................................................................. 9-7
Serial Peripheral Interface (SPI) ................................................................................................. 9-8
SPI Operation ............................................................................................................................. 9-9
SPI Compare .............................................................................................................................. 9-9
SPI Clock .................................................................................................................................... 9-9
Receive Character Available and Overrun ............................................................................... 9-11
Chapter 10. External Interface
Introduction ............................................................................................................................... 10-1
Pin Descriptions ........................................................................................................................ 10-2
AS ...................................................................................................................................... 10-2
DS ...................................................................................................................................... 10-2
R/W .................................................................................................................................... 10-2
DM ..................................................................................................................................... 10-2
P07 - P00 ........................................................................................................................... 10-2
P17 - P10 .......................................................................................................................... 10-2
RESET ............................................................................................................................... 10-2
XTAL1, XTAL2 ................................................................................................................... 10-2