ABB Relion 670 series - Page 1139

TSU
PCI-Controller
ID-chip
MPPS
PPS
FPGA
PCI-bus
P
C
I
-
c
o
n
P
C
I
-
c
o
n
I
O
-
c
o
n
32 MHz
Registers
IRIG-
Decoder
Isolated
DC/DC
5 to +- 12V
S
T
-
c
o
n
n
e
c
t
o
r
Isolated
receiver
4 mm barrier
ZXING
IRIG_INPUT
OPTO_INPUT
Zero-cross
detector
Amplitude
modulator
B
N
C
-
c
o
n
n
e
c
t
o
r
CMPPS
Capture1
Capture2
en06000303.vsd
IEC06000303 V1 EN
Figure 543: IRIG-B block diagram
3
2
C
ST
A
1
Y2
D
C
/
/
D
C
D
C
/
/
D
C
O
O
C
T
A
1
C
C
en06000304.vsd
IEC06000304 V1 EN
Figure 544: IRIG-B PC-MIP board with top left ST connector for PPS 820 nm
multimode fibre optic signal input and lower left BNC connector for IRIG-
B signal input
1MRK505222-UUS C Section 19
IED hardware
1133
Technical reference manual