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ABB Relion 670 series - Page 588

ABB Relion 670 series
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a
b
b>a
Selected current
PickupCurr_UC1
Operation_UC1=On
Bin input: BLKUC1
P
U
_
U
C
1
en05000750_ansi.vsd
TRUC1
Bin input: BLKUC1TR
0-DEF
AND
AND
0
ANSI05000750 V1 EN
Figure 296: Simplified internal logic diagram for built-in first undercurrent step that is, UC1 (step UC2 has the
same internal logic)
a
b
a>b
Selected voltage
PickupVolt_OV1
Operation_OV1=On
BLKOV1
Inverse time
selected
en05000751_ansi.vsd
Inverse
0-DEF
DEF time
selected
PU_OV1
TROV1
AND
BLKTROV1
AND
OR
0
ANSI05000751 V1 EN
Figure 297: Simplified internal logic diagram for built-in first overvoltage step OV1 (step OV2 has the same
internal logic)
Section 10 1MRK505222-UUS C
Multipurpose protection
582
Technical reference manual

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