Allwinner A20 - Page 114

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 114 / 812
Offset: 0x18
Register Name: TMR0_CUR_VALUE_REG
Bit
Read/
Write
Default/Hex
Description
31:0
R/W
0x0
TMR0_CUR_VALUE.
Timer 0 Current Value.
Note: Timer 0 current value is a 32-bit down-counter(from interval value to 0). This register can be
read correctly if the PCLK is faster than 2*TimerFreq(TimerFreq = TimerClkSource/pre-scale).
1.9.3.6. TIMER 1 CONTROL REGISTER(DEFAULT: 0X00000004)
Offset: 0x20
Register Name: TMR1_CTRL_REG
Bit
Read/
Write
Default/He
x
Description
31:8
/
/
/.
7
R/W
0x0
TMR1_MODE.
Timer 1 mode.
0: Continuous mode. When interval value reached, the timer will
not disable automatically.
1: Single mode. When interval value reached, the timer will
disable automatically.
6:4
R/W
0x0
TMR1_CLK_PRES.
Select the pre-scale of timer 1 clock source.
000: /1
001: /2
010: /4
011: /8
100: /16
101: /32
110: /64
111: /128
3:2
R/W
0x1
TMR1_CLK_SRC.
Timer 1 Clock Source.
00: Low speed OSC,
01: OSC24M.
10: PLL6/6
11: /.
1
R/W
0x0
TMR1_RELOAD.
Timer 1 Reload.