Allwinner A20 - Page 125

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 125 / 812
1.9.3.24. WATCHDOG CONTROL REGISTER
Offset: 0x90
Register Name: WDOG_CTRL_REG
Bit
Read/
Write
Default/Hex
Description
31:1
/
/
/.
0
R/W
0x0
WDOG_RSTART.
Watchdog Restart.
0: No effect, 1: Restart the Watchdog.
1.9.3.25. WATCHDOG MODE REGISTER(DEFAULT: 0X00000000)
Offset: 0x94
Register Name: WDOG_MODE_REG
Bit
Read/
Write
Default/Hex
Description
31:7
/
/
/.
6:3
R/W
0x0
WDOG_INTV_VALUE.
Watchdog Interval Value
Watchdog clock source is OSC24M. if the OSC24M is turned
off, the watchdog will not work.
0000: 0.5sec
0001: 1sec
0010: 2sec
0011: 3sec
0100: 4sec
0101: 5sec
0110: 6sec
0111: 8sec
1000: 10sec
1001: 12sec
1010: 14sec
1011: 16sec
1100: /
1101: /
1110: /
1111: /