Allwinner A20 - Page 167

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 167 / 812
Offset:
0x300+N*0x20
(N=0,1,2,3,4,5,6,7)
Register Name: DDMA_CFG_REG
Bit
Read
/Write
Default/Hex
Description
0x6: Ethernet MAC Tx
0x7: /
0x8: SPI1 TX
0x9: /
0xA: Security System Tx
0xB: /
0xC: /
0xD: /
0xE: TCON0
0xF: TCON1
0x10: /
0x11: /
0x12: /
0x13: /
0x14: /
0x15: /
0x16: /
0x17: Memory Stick Controller (MSC)
0x18: HDMI Audio
0x19: /
0x1A: SPI0 TX
0x1B: /
0x1C: SPI2 TX
0x1D: /
0x1E: SPI3 TX
0x1F: /
15
R/W
0x0
BC_MODE_SEL.
BC mode select.
0 : normal mode(the value read back is equal to the value that is
written)
1 : remain mode(the value read back is equal to the remain
counter to be transfered).
14:13
/
/
/.
12
R/W
0x0
DMA_SRC_SEC.
DMA Source Security.
0: secure, 1: non-secure.
11
/
/
/