Allwinner A20 - Page 194

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 194 / 812
Offset: 0x04
Register Name: LRADC_INTC
Bit
Read/
Write
Default/He
x
Description
1: Enable
11
R/W
0x0
ADC1_ALRDY_HOLD_IRQ_EN.
ADC 1 Already Hold Key IRQ Enable
0: Disable
1: Enable
10
R/W
0x0
ADC 1 Hold Key IRQ Enable
0: Disable
1: Enable
9
R/W
0x0
ADC1_KEYIRQ_EN.
ADC 1 Key IRQ Enable
0: Disable
1: Enable
8
R/W
0x0
ADC1_DATA_IRQ_EN.
ADC 1 DATA IRQ Enable
0: Disable
1: Enable
7:5
/
/
/
4
R/W
0x0
ADC0_KEYUP_IRQ_EN.
ADC 0 Key Up IRQ Enable
0: Disable
1: Enable
3
R/W
0x0
ADC0_ALRDY_HOLD_IRQ_EN.
ADC 0 Already Hold IRQ Enable
0: Disable
1: Enable
2
R/W
0x0
ADC0_HOLD_IRQ_EN.
ADC 0 Hold Key IRQ Enable
0: Disable
1: Enable
1
R/W
0x0
ADC0_KEYDOWN_EN
ADC 0 Key Down Enable
0: Disable
1: Enable
0
R/W
0x0
ADC0_DATA_IRQ_EN.