Allwinner A20 - Page 317

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 317 / 812
3.1.4.6. INPUT DMA LINE WIDTH REGISTER
Offset:
iDMA0:0x20
iDMA1:0x24
iDMA2:0x28
iDMA3:0x2C
Register Name: MP_IDMALINEWIDTH_REG
Bit
Read/W
rite
Default/
Hex
Description
31:0
R/W
0
IDMA_LINEWIDTH
iDMA
Line width in bits
3.1.4.7. INPUT DMA MEMORY BLOCK SIZE REGISTER
Offset:
iDMA0:0x30
iDMA1:0x34
iDMA2:0x38
iDMA3:0x3C
Register Name: MP_IDMASIZE_REG
Bit
Read/W
rite
Default/
Hex
Description
31:29
/
/
/
28:16
R/W
0
IDMA_HEIGHT
Memory block height in pixels
The height = The value of these bits add 1
15:13
/
/
/
12:0
R/W
0
IDMA_WIDTH
Memory block width in pixels
The width = The value of these bits add 1