Allwinner A20 - Page 419

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 419 / 812
Offset: 0x070
Register Name: TCON0_TTL0_REG
Bit
Read/
Write
Default/
Hex
Description
19:0
R/W
0
STVD
VSYNC-STV delay time
Tstvd = STVD[19:10] * Thsync + STVD[9:0] * Tdclk
5.1.4.16. TCON0 TTTL PANEL TIMING REGISTER 1
Offset: 0x074
Register Name: TCON0_TTL1_REG
Bit
Read/
Write
Default/
Hex
Description
31:30
R/W
0
CKVT
CKV period (in line)
Tckvt = (CKVT +1) * Thsync
29:20
/
/
/
19:10
R/W
0
CKVH
CKV high plus width (in dclk)
Tckvh = (CKVH +1) * Tdclk
9:0
R/W
0
CKVD
VSYNC –CKV delay time(in dclk)
Tdskv = CKVD * Tdclk
5.1.4.17. TCON0 TTL PANEL TIMING REGISTER 2
Offset: 0x078
Register Name: TCON0_TTL2_REG
Bit
Read/
Write
Default/
Hex
Description
31:30
R/W
0
OEVT
OEV period (in line)
Toevt = (OEVT +1) * Thsync
29:20
/
/
/
19:10
R/W
0
OEVH
OEV high plus width (in dclk)