Allwinner A20 - Page 46

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 46 / 812
15
/
/
/
14
R/W
0x0
SATA_CLK_EN.
Sata clock output enable.
0:Disable;1:enable.
13
/
/
/
12:8
R/W
0x19
PLL6_FACTOR_N.
PLL6 Factor N.
Factor=0, N=0;
Factor=1, N=1;
Factor=2, N=2;
……
Factor=31,N=31
7:6
/
/
/
5:4
R/W
0x1
PLL6_FACTOR_K.
PLL6 Factor K.(K=Factor + 1 )
The range is from 1 to 4.
3:2
/
/
/
1:0
R/W
0x1
PLL6_FACTOR_M.
PLL6 Factor M.(M = Factor + 1 )
The range is from 1 to 4.
1.5.4.10. PLL6-TUNING
Offset: 0x2C
Register Name: PLL6_TUN_REG
Bit
Read/
Write
Default/Hex
Description
31:0
/
/
/
1.5.4.11. PLL7-VIDEO 1(DEFAULT: 0X0010D063)
Offset: 0x30
Register Name: PLL7_CFG_REG