Allwinner A20 - Page 602

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 602 / 812
Offset: 0x14
Register Name: SPI_DMACTL
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
9
R/W
0
TF_HE_DMA
TXFIFO Half Empty DMA Request Enable
0: Disable
1: Enable
8
R/W
0
TF_EMP_DMA
TXFIFO Empty DMA Request Enable
0: Disable
1: Enable
7:5
/
/
/
4
R/W
0
RF_FU34_DMA
RXFIFO 3/4 Full DMA Request Enable
This bit enables/disables the RXFIFO 3/4 Full DMA Request.
0: Disable
1: Enable
3
R/W
0
RF_FU14_DMA
RXFIFO 1/4 Full DMA Request Enable
This bit enables/disables the RXFIFO 1/4 Full DMA Request.
0: Disable
1: Enable
2
R/W
0
RF_FU_DMA
RXFIFO Full DMA Request Enable
This bit enables/disables the RXFIFO Half Full DMA Request.
0: Disable
1: Enable
1
R/W
0
RF_HF_DMA
RXFIFO Half Full DMA Request Enable
This bit enables/disables the RXFIFO Half Full DMA Request.
0: Disable
1: Enable
0
R/W
0
RF_RDY_DMA
RXFIFO Ready Request Enable
This bit enables/disables the RXFIFO Ready DMA Request
when one or more than one words in RXFIFO
0: Disable