Allwinner A20 - Page 646

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 646 / 812
6.6.3.4. IR TRANSMITTER COUNTER REGISTER
Offset: 0x0C
Register Name: IR_TXCNT
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:11
/
/
/
10:0
R/W
0
TPL
Transmit Packet Length
This field contains the length of the address, control and data.
The length are (N+1) bytes.
11’d0: 1 bytes
11’d1: 2 bytes
11’d2: 3 bytes
…
11’d2046: 2047 bytes
11’d2047: 2048 bytes
6.6.3.5. IR RECEIVER CONFIGURE REGISTER
Offset: 0x10
Register Name: IR_RXCTL
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:4
/
/
/
3
R/W
0
RPA
Receiver Packet Abort bit.
Determines behavior of the RX FIFO upon detection of an
illegal symbol. When an illegal symbol is detected, the DDE or
CRCE bit in the receiver status register is set. If the RPA bit is
set, the RX FIFO pointers are cleared and the receiver starts to
search for the PA or STA fields for FIR and MIR mode,
respectively. If RPA is cleared, the receiver continues to write
to the RX FIFO.
0: Does not clear the RX FIFO upon detection of an illegal
symbol
1: Clears the RX FIFO upon detection of illegal symbol
2
R/W
1
RPPI
Receiver Pulse Polarity Invert
0: Not invert receiver signal