Allwinner A20 - Page 671

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 671 / 812
Offset: 0x18
Register Name: USBINTR
Default Value:0x00000000
Bit
Read/Write
Default
Description
is 1,the host controller will issue an interrupt at the next
interrupt threshold.
The interrupt is acknowledged by software clearing the
USBINT bit
6.8.5.9. EHCI FRAME INDEX REGISTER
Offset: 0x1c
Register Name: FRINDEX
Default Value: 0x00000000
Bit
Read/Write
Default
Description
31:14
/
0
Reserved
These bits are reserved and should be zero.
13:0
R/W
0
FRIND
Frame Index
The value in this register increment at the end of each time
frame(e.g. micro-frame).Bits[N:3] are used for the Frame List
current index. It means that each location of the frame list is
accessed 8 times(frames or Micro-frames) before moving to the
next index. The following illustrates Values of N based on the
value of the Frame List Size field in the USBCMD register.
USBCMD[Frame List Size]
Number Elements
N
00b
1024
12
01b
512
11
10b
256
10
11b
Reserved
Note: This register must be written as a DWord. Byte writes produce undefined results.
6.8.5.10. EHCI PERIODIC FRAME LIST BASE ADDRESS REGISTER
Offset: 0x24
Register Name: PERIODICLISTBASE
Default Value: Undefined
Bit
Read/Write
Default
Description
31:12
R/W
BADDR
Base Address
These bits correspond to memory address signals [31:12],