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Allwinner A20 - Page 674

Allwinner A20
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A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 674 / 812
Offset: 0x54
Register Name: PORTSC
Default Value: 0x00002000(w/PPC set to
one);0x00003000(w/PPC set to a zero)
Bit
Read/Write
Default
Description
device connects as wake-up events.
This field is zero if Port Power is zero.
The default value in this field is ‘0’.
19:16
R/W
0
/
15:14
R/W
0
Reserved
These bits are reserved for future use and should return a
value of zero when read.
13
R/W
1
PO
Port Owner
This bit unconditionally goes to a 0b when the Configured bit in
the CONFIGFLAG register makes a 0b to 1b transition. This bit
unconditionally goes to 1b whenever the Configured bit is
zero.
System software uses this field to release ownership of the
port to selected host controller (in the event that the attached
device is not a high-speed device).Software writes a one to
this bit when the attached device is not a high-speed device. A
one in this bit means that a companion host controller owns
and controls the port.
Default Value = 1b.
12
/
0
Reserved
These bits are reserved for future use and should return a
value of zero when read.
11:10
R
0
LS
Line Status
These bits reflect the current logical levels of the D+ (bit11)
and D-(bit10) signal lines. These bits are used for detection of
low-speed USB devices prior to port reset and enable
sequence. This read only field is valid only when the port
enable bit is zero and the current connect status bit is set to a
one.
The encoding of the bits are:
Bit[11:10
]
USB State
Interpretation
00b
SE0
Not Low-speed device, perform EHCI
reset.
10b
J-state
Not Low-speed device, perform EHCI
reset.
01b
K-state
Low-speed device, release ownership
of port.

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