Allwinner A20 - Page 684

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 684 / 812
4
R/W
R
0x0
0
Ignore;
1
Enable interrupt generation due to Unrecoverable Error;
3
R/W
R
0x0
ResumeDetected Interrupt Enable
0
Ignore;
1
Enable interrupt generation due to Resume Detected;
2
R/W
R
0x0
StartofFrame Interrupt Enable
0
Ignore;
1
Enable interrupt generation due to Start of Flame;
1
R/W
R
0x0
WritebackDoneHead Interrupt Enable
0
Ignore;
1
Enable interrupt generation due to Write back Done Head;
0
R/W
R
0x0
SchedulingOverrun Interrupt Enable
0
Ignore;
1
Enable interrupt generation due to Scheduling Overrun;
6.8.7.6. HCINTERRUPTDISABLE REGISTER
Offset: 0x414
Register Name: HcInterruptDisable Register
Default Value: 0x0
Bit
Read/Write
Default
Description
HCD
HC
31
R/W
R
0x0
MasterInterruptEnable
A written ‘0’ to this field is ignored by HC. A ‘1’ written to this field
disables interrupt generation due events specified in the other bits
of this register. This field is set after a hardware or software reset.
30:7
Reserved
6
R/W
R
0x0
RootHubStatusChange Interrupt Disable
0
Ignore;
1
Disable interrupt generation due to Root Hub Status
Change;
5
R/W
R
0x0
FrameNumberOverflow Interrupt Disable
0
Ignore;
1
Disable interrupt generation due to Frame Number Over
Flow;
4
R/W
R
0x0
UnrecoverableError Interrupt Disable
0
Ignore;
1
Disable interrupt generation due to Unrecoverable Error;
3
R/W
R
0x0
ResumeDetected Interrupt Disable
0
Ignore;
1
Disable interrupt generation due to Resume Detected;
2
R/W
R
0x0
StartofFrame Interrupt Disable
0
Ignore;
1
Disable interrupt generation due to Start of Flame;