Allwinner A20 - Page 70

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 70 / 812
Offset: 0xC4
Register Name: KEYPAD_CLK_REG
Bit
Read/
Write
Default/Hex
Description
1: /
2: LOSC clock (32KHz)
3: /
23:18
/
/
/
17:16
R/W
0x0
CLK_RATIO_N.
Clock pre-divide ratio (n)
The select clock source is pre-divided by 2^n. The divider is
1/2/4/8.
15:5
/
/
/.
4:0
R/W
0x1f
CLK_RATIO_M.
Clock divide ratio (m)
The pre-divided clock is divided by (m+1). The divider is from
1 to 32.
1.5.4.38. SATA CLOCK(DEFAULT: 0X00000000)
Offset: 0xC8
Register Name: SATA_CLK_REG
Bit
Read/
Write
Default/Hex
Description
31
R/W
0x0
SCLK_GATING.
Gating Special Clock
0: Clock is OFF
1: Clock is ON
30:25
/
/
/
24
R/W
0x0
CLK_SRC_GATING.
Clock Source Select
0: PLL6 for SATA(100MHz)
1: External Clock
23:0
/
/
/
1.5.4.39. USB CLOCK(DEFAULT: 0X00000000)
Offset: 0xCC
Register Name: USB_CLK_REG