Allwinner A20 - Page 705

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 705 / 812
Offset: 0x08
Register Name: DA_FAT1
Default Value: 0x0000_4020
Bit
Read/Write
Default
Description
1:0
R/W
0
TX_PDM
PCM Data Mode
00: 16-bits Linear PCM
01: 8-bits Linear PCM
10: 8-bits u-law
11: 8-bits A-law
6.9.5.4. DIGITAL AUDIO TX FIFO REGISTER
Offset: 0x0C
Register Name: DA_TXFIFO
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:0
W
0
TX_DATA
TX Sample
Transmitting left, right channel sample data should be written
this register one by one. The left channel sample data is first
and then the right channel sample.
6.9.5.5. DIGITAL AUDIO RX FIFO REGISTER
Offset: 0x10
Register Name: DA_RXFIFO
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:0
R
0
RX_DATA
RX Sample
Host can get one sample by reading this register. The left
channel sample data is first and then the right channel sample.