01: Expanding received sample sign bit at MSB of
DA_RXFIFO register.
10: Truncating received samples at high half-word of
DA_RXFIFO register and low half-word of DA_RXFIFO
register is filled by ‘0’.
11: Truncating received samples at low half-word of
DA_RXFIFO register and high half-word of DA_RXFIFO
register is expanded by its sign bit.
Example for 20-bits received audio sample:
Mode 0: RXFIFO[31:0] = {FIFO_O[19:0], 12’h0}
Mode 1: RXFIFO[31:0] = {12{FIFO_O[19]}, FIFO_O[19:0]}
Mode 2: RXFIFO[31:0] = {FIFO_O[19:4], 16’h0}
Mode 3: RXFIFO[31:0] = {16{FIFO_O[19], FIFO_O[19:4]}