Allwinner A20 - Page 778

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 778 / 812
6.14.5.5. SMART CARD READER FIFO COUNT REGISTER
Offset: 0x0010
Register Name: SCR_FIFOCNT
Default Value: 0x00000000
Bit
Read/Write
Default
Description
31:24
R/W
0
RXFTH
RX FIFO Threshold
These bits set the interrupt threshold of RX FIFO. The interrupt
is asserted when the number of bytes it receives is equal to, or
exceeds the threshold.
23:16
R/W
0
TXFTH
TX FIFO Threshold
These bits set the interrupt threshold of TX FIFO. The interrupt
is asserted when the number of bytes in TX FIFO is equal to or
less than the threshold.
15:8
R
0
RXFCNT
RX FIFO Counter
These bits provide the number of bytes stored in the RXFIFO.
7:0
R
0
TXFCNT
TX FIFO Counter
These bits provide the number of bytes stored in the TXFIFO.
6.14.5.6. SMART CARD READER REPEAT CONTROL REGISTER
Offset: 0x0014
Register Name: SCR_REPEAT
Default Value: 0x00000000
Bit
Read/Write
Default
Description
15:8
/
/
/
7:4
R/W
0
RXRPT
RX Repeat
This is a 4-bit register that specifies the number of attempts to
request character re-transmission after wrong parity was
detected. The re-transmission of the character is requested
using the error signal during the guard time.
3:0
R/W
0
TXRPT