System Control
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 4-49
ID021414 Non-Confidential
Register access is encoded as follows:
4.3.28 Virtualization Processor ID Register
The VPIDR_EL2 characteristics are:
Purpose Holds the value of the Virtualization Processor ID. This is the value
returned by Non-secure EL1 reads of MIDR. See MIDR_EL1 bit
assignments on page 4-14.
Usage constraints This register is accessible as follows:
Configurations VPIDR_EL2 is architecturally mapped to AArch32 register VPIDR. See
Virtualization Processor ID Register on page 4-189.
Attributes VPIDR_EL2 is a 32-bit register.
VPIDR_EL2 resets to the value of MIDR_EL1.
Figure 4-26 shows the VPIDR_EL2 bit assignments.
Figure 4-26 VPIDR_EL2 bit assignments
Table 4-63 shows the VPIDR_EL2 bit assignments.
To access the VPIDR_EL2:
MRS <Xt>, VPIDR_EL2 ; Read VPIDR_EL2 into Xt
MSR VPIDR_EL2, <Xt> ; Write Xt to VPIDR_EL2
Register access is encoded as follows:
Table 4-62 DCZID_EL0 access encoding
op0 op1 CRn CRm op2
11 011 0000 0000 111
EL0
EL1
(NS)
EL1
(S)
EL2
EL3
(SCR.NS = 1)
EL3
(SCR.NS = 0)
---RWRW -
Table 4-63 VPIDR_EL2 bit assignments
Bits Name Function
[31:0] VPIDR MIDR value returned by Non-secure PL1 reads of the MIDR. The MIDR description defines the subdivision of
this value. See MIDR_EL1 bit assignments on page 4-14.
Table 4-64 VPIDR_EL2 access encoding
op0 op1 CRn CRm op2
11 100 0000 0000 000
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