System Control
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 4-51
ID021414 Non-Confidential
Usage constraints This register is accessible as follows:
Configurations SCTLR_EL1 is architecturally mapped to AArch32 register SCTLR(NS)
See System Control Register on page 4-191.
Attributes SCTLR_EL1 is a 32-bit register.
Figure 4-28 shows the SCTLR_EL1 bit assignments.
Figure 4-28 SCTLR_EL1 bit assignments
EL0
EL1
(NS)
EL1
(S)
EL2
EL3
(SCR.NS = 1)
EL3
(SCR.NS = 0)
-RWRWRWRW RW
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