System Control
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 4-162
ID021414 Non-Confidential
4.5.7 Processor Feature Register 1
The ID_PFR1 characteristics are:
Purpose Provides information about the programmers model and architecture
extensions supported by the processor.
Usage constraints This register is accessible as follows:
Must be interpreted with ID_PFR0.
Configurations ID_PFR1 is architecturally mapped to AArch64 register ID_PFR1_EL1.
See AArch32 Processor Feature Register 1 on page 4-18.
There is one copy of this register that is used in both Secure and
Non-secure states.
Attributes ID_PFR1 is a 32-bit register.
Figure 4-80 shows the ID_PFR1 bit assignments.
Figure 4-80 ID_PFR1 bit assignments
EL0
(NS)
EL0
(S)
EL1
(NS)
EL1
(S)
EL2
EL3
(SCR.NS = 1)
EL3
(SCR.NS = 0)
--RORORORO RO
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