System Control
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 4-165
ID021414 Non-Confidential
4.5.10 Memory Model Feature Register 0
The ID_MMFR0 characteristics are:
Purpose Provides information about the memory model and memory management
support in AArch32.
Usage constraints This register is accessible as follows:
Must be interpreted with ID_MMFR1, ID_MMFR2, and ID_MMFR3.
See:
• Memory Model Feature Register 1 on page 4-166.
• Memory Model Feature Register 2 on page 4-168.
• Memory Model Feature Register 3 on page 4-170.
Configurations ID_MMFR0 is architecturally mapped to AArch64 register
ID_MMFR0_EL1.
There is one copy of this register that is used in both Secure and
Non-secure states.
Attributes ID_MMFR0 is a 32-bit register.
Figure 4-82 shows the ID_MMFR0 bit assignments.
Figure 4-82 ID_MMFR0 bit assignments
EL0
(NS)
EL0
(S)
EL1
(NS)
EL1
(S)
EL2
EL3
(SCR.NS = 1)
EL3
(SCR.NS = 0)
- - RO RO RO RO RO
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