System Control
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 4-257
ID021414 Non-Confidential
Table 4-231 shows the PRRR bit assignments.
Table 4-231 PRRR bit assignments
Bits Name Function
[24+n]
a
NOSn Outer Shareable property mapping for memory attributes n, if the region is mapped as Normal Shareable. n
is the value of the TEX[0], C and B bits concatenated. The possible values of each NOSn bit are:
0
Memory region is Outer Shareable.
1
Memory region is Inner Shareable.
The value of this bit is ignored if the region is Normal or Device memory that is not Shareable.
[23:20] - Reserved, RES0.
[19] NS1 Mapping of S = 1 attribute for Normal memory. This bit gives the mapped Shareable attribute for a region of
memory that:
• Is mapped as Normal memory.
• Has the S bit set to 1.
The possible values of the bit are:
0
Region is not Shareable.
1
Region is Shareable.
[18] NS0 Mapping of S = 0 attribute for Normal memory. This bit gives the mapped Shareable attribute for a region of
memory that:
• Is mapped as Normal memory.
• Has the S bit set to 0.
The possible values of the bit are the same as those given for the NS1 bit, bit[19].
[17] DS1 Mapping of S = 1 attribute for Device memory. This bit gives the mapped Shareable attribute for a region of
memory that:
• Is mapped as Device memory.
• Has the S bit set to 1.
This field has no significance in the processor.
[16] DS0 Mapping of S = 0 attribute for Device memory. This bit gives the mapped Shareable attribute for a region of
memory that:
• Is mapped as Device memory.
• Has the S bit set to 0.
This field has no significance in the processor.
[2n+1:2n]
a
TRn Primary TEX mapping for memory attributes n. n is the value of the TEX[0], C and B bits, see Table 4-232
on page 4-258. This field defines the mapped memory type for a region with attributes n. The possible values
of the field are:
0b00
Device (nGnRnE).
0b01
Device (not nGnRnE).
0b10
Normal Memory.
0b11
Reserved, effect is UNPREDICTABLE.
a. Where n is 0-7.