System Control
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 4-258
ID021414 Non-Confidential
Table 4-232 shows the mapping between the memory region attributes and the n value used in
the PRRR.nOSn and PRRR.TRn field descriptions.
Large physical address translations use Long-descriptor translation table formats and MAIR0
replaces the PRRR, and MAIR1 replaces the NMRR. For more information see Memory
Attribute Indirection Registers 0 and 1 on page 4-259.
To access the PRRR:
MRC p15, 0, <Rt>, c10, c2, 0 ; Read PRRR into Rt
MCR p15, 0, <Rt>, c10, c2, 0 ; Write Rt to PRRR
Table 4-232 Memory attributes and the n value for the PRRR field descriptions
Attributes
n value
TEX[0] C B
0000
0011
0102
0113
1004
1015
1106
1117
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