Level 1 Memory System
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 6-18
ID021414 Non-Confidential
Table 6-14 shows the main TLB memory types and shareability.
[65] NS, descriptor Security state allocated to memory region.
[64:63] HAP Hypervisor access permissions.
[62:60] AP or HYP Access permissions from stage-1 translation, or select EL2 or flag.
[59] nG Not global.
[58:56] Size This field shows the encoding for the page size:
VMSAv8-32 Short-descriptor translation table format:
0b000
4KB.
0b010
64KB.
0b100
1MB.
0b110
16MB.
VMSAv8-32 Long-descriptor translation table format or VMSAv8-64 translation table
format:
0b001
4KB.
0b011
64KB.
0b101
2MB.
0b111
512MB.
[55:40] ASID Address Space Identifier.
[39:32] VMID Virtual Machine Identifier.
[31] NS (walk) Security state that the entry was fetched in.
[30:2] VA Virtual Address.
[1] Address Sign bit VA[48] sign bit.
[0] Valid Valid bit:
0
Entry does not contain valid data.
1
Entry contains valid data.
Table 6-13 Main TLB descriptor data fields (continued)
Bits Name Description
Table 6-14 Main TLB memory types and shareability
Bits Memory type Description
[7] Device 0
Non-coherent, Outer WB
Non-coherent, Outer NC
Non-coherent, Outer WT
Coherent, Inner WB and Outer WB 1
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