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ARM Cortex-A53 MPCore - Page 430

ARM Cortex-A53 MPCore
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Debug
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 11-28
ID021414 Non-Confidential
Peripheral Identification Register 0
The EDPIDR0 characteristics are:
Purpose Provides information to identify an external debug component.
Usage constraints This register is accessible as follows:
Table 11-1 on page 11-5 describes the condition codes.
Configurations The EDPIDR0 is in the Debug power domain.
Attributes See the register summary in Table 11-11 on page 11-21.
Figure 11-11 shows the EDPIDR0 bit assignments.
Figure 11-11 EDPIDR0 bit assignments
Table 11-16 shows the EDPIDR0 bit assignments.
The EDPIDR0 can be accessed through the internal memory-mapped interface and the external
debug interface, offset
0xFE0
.
Peripheral Identification Register 1
The EDPIDR1 characteristics are:
Purpose Provides information to identify an external debug component.
Usage constraints This register is accessible as follows:
Table 11-1 on page 11-5 describes the condition codes.
Configurations The EDPIDR1 is in the Debug power domain.
Attributes See the register summary in Table 11-11 on page 11-21.
Figure 11-12 on page 11-29 shows the EDPIDR1 bit assignments.
Off DLK OSLK EDAD SLK Default
-- - - - RO
RES0
31 0
78
Part_0
Table 11-16 EDPIDR0 bit assignments
Bits Name Function
[31:8] - Reserved,
RES0.
[7:0] Part_0
0x03
Least significant byte of the debug part number.
Off DLK OSLK EDAD SLK Default
-- - - - RO

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