Debug
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 11-48
ID021414 Non-Confidential
Table 11-1 on page 11-5 describes the condition codes.
Configurations The ROMPIDR3 is in the Debug power domain.
Attributes See the register summary in Table 11-28 on page 11-41.
Figure 11-25 shows the ROMPIDR3 bit assignments.
Figure 11-25 ROMPIDR3 bit assignments
Table 11-36 shows the ROMPIDR3 bit assignments.
The ROMPIDR3 can be accessed through the internal memory-mapped interface and the
external debug interface, offset
0xFEC
.
Peripheral Identification Register 4
The ROMPIDR4 characteristics are:
Purpose Provides information to identify an external debug component.
Usage constraints This register is accessible as follows:
Table 11-1 on page 11-5 describes the condition codes.
Configurations The ROMPIDR4 is in the Debug power domain.
Attributes See the register summary in Table 11-28 on page 11-41.
Figure 11-26 shows the ROMPIDR4 bit assignments.
Figure 11-26 ROMPIDR4 bit assignments
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