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ARM Cortex-A53 MPCore - Page 530

ARM Cortex-A53 MPCore
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Embedded Trace Macrocell
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 13-35
ID021414 Non-Confidential
13.8.25 ID Register 9
The TRCIDR9 characteristics are:
Purpose Returns the number of P0 right-hand keys that the trace unit can use.
Usage constraints There are no usage constraints.
Configurations Available in all configurations.
Attributes See the register summary in Table 13-3 on page 13-10.
Figure 13-27 shows the TRCIDR9 bit assignments.
Figure 13-27 TRCID9 bit assignments
Table 13-28 shows the TRCIDR9 bit assignments.
The TRCIDR9 can be accessed through the internal memory-mapped interface and the external
debug interface, offset
0x184
.
13.8.26 ID Register 10
The TRCIDR10 characteristics are:
Purpose Returns the number of P1 right-hand keys that the trace unit can use.
Usage constraints There are no usage constraints.
Configurations Available in all configurations.
Attributes See the register summary in Table 13-3 on page 13-10.
Figure 13-28 shows the TRCIDR10 bit assignments.
Figure 13-28 TRCIDR10 bit assignments
31 0
NUMP0KEY
Table 13-28 TRCID9 bit assignments
Bits Name Function
[31:0] NUMP0KEY The number of P0 right-hand keys that the trace unit can use.
0
Number of P0 right-hand keys.
31 0
NUMP1KEY

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