Embedded Trace Macrocell
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 13-65
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Figure 13-60 shows the TRCLSR bit assignments.
Figure 13-60 TRCLSR bit assignments
Table 13-62 shows the TRCLSR bit assignments.
The TRCLSR can be accessed through the internal memory-mapped interface and the external
debug interface, offset
0xFB4
.
13.8.60 Authentication Status Register
The TRCAUTHSTATUS characteristics are:
Purpose Indicates the current level of tracing permitted by the system.
Usage constraints There are no usage constraints.
Configurations Available in all configurations.
Attributes See the register summary in Table 13-3 on page 13-10
Figure 13-61 shows the TRCAUTHSTATUS bit assignments.
Figure 13-61 TRCAUTHSTATUS bit assignments
Table 13-62 TRCLSR bit assignments
Bits Name Function
[31:3] - Reserved,
RES0.
[2] nTT Indicates size of TRCLAR:
0
TRCLAR is always 32 bits.
[1] SLK Software lock status:
0
Software lock is clear.
1
Software lock is set.
[0] SLI Indicates whether the software lock is implemented on this interface.
1
Software lock is implemented on this interface.
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