System Control
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 4-21
ID021414 Non-Confidential
Register access is encoded as follows:
4.3.7 AArch32 Auxiliary Feature Register 0
This register is always
RES0.
4.3.8 AArch32 Memory Model Feature Register 0
The ID_MMFR0_EL1 characteristics are:
Purpose Provides information about the memory model and memory management
support in AArch32.
Usage constraints This register is accessible as follows:
Configurations ID_MMFR0_EL1 is architecturally mapped to AArch32 register
ID_MMFR0. See Memory Model Feature Register 0 on page 4-165.
Attributes ID_MMFR0_EL1 is a 32-bit register.
Figure 4-7 shows the ID_MMFR0_EL1 bit assignments.
Figure 4-7 ID_MMFR0_EL1 bit assignments
Table 4-24 REVIDR access encoding
op0 op1 CRn CRm op2
1111 000 0000 0001 010
EL0
EL1
(NS)
EL1
(S)
EL2
EL3
(SCR.NS = 1)
EL3
(SCR.NS = 0)
-RORORORO RO
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