Intel740™ Graphics Accelerator Design Guide
2-23
Addin Card Design
AGP Card Edge (Schematic Page 9)
This page details the connections of AGP. All power is derived from this connector. Using the rule
of 1A per pin, the 12 volt supply is capable of supplying 1A, the 5 Volt supply is capable of
supplying 2A and the 3.3 Volt supply is capable of supplying 8A.
VGA Connector
(Schematic Page 10)
The VGA connector provides the RGB output to a monitor. BIOS and hardware provide support
for plug-and-play capability.
DDC/I
2
C (Schematic Page 11)
This page details the 3.3 volt/5 volt signal conversion as well as the DDC/I
2
C connections. To
perform the voltage translation, quick switches are used. The quick switches at the top of the page
serve a second function of isolating the VMI port from the Intel740 graphics accelerator. GPIO6
can tri-state this bus to preclude the possibility of contention between something connected to the
VMI header and the Bt829B.
SO-DIMM Connector (Schematic Page 12)
The SO-DIMM connector shows a fairly straight forward connection to the Intel740 graphics
accelerator memory signals. Note that the primary CS0 connection is tied to the Intel740 graphics
accelerator CSA1# signal. The CSB0# signal is connected to CS1 on the connector. The reference
design has the first row of memory down on the graphics card. The second row of memory is
assumed to be placed in the SO-DIMM connector.
Note: It is important not to have the memory on the graphics card and memory on the SO-DIMM
connector connected to the same row.
SGRAMS (Schematic Page 13)
The SGRAMs shown on this page are labeled as 512Kx32. The schematic pinout is actually
capable of supporting either the 512Kx32 or 256Kx32 SGRAMs. This dual-support connection is
achieved through the following method. The 512Kx32 Jedec standard defines AP on pin 51 which
is address 9. BS is on pin 29 and is also labeled as address 10. Address 8 is on pin 30. The Intel740
contains the AP on its address 8 pin and BS on address 9 pin. Since the 256Kx32 has AP with
graphics accelerator address 8 and on pin 51 along with BS with address 9 on pin 29 and a no
connect on pin 30, either the 512K or the 256K SGRAMs are capable of being supported in the
same design (see Figure 2-23).
Note: It is important to disable the special features of SGRAM. This will make the SGRAM operate as an
SDRAM, thus making it compatible with the Intel740 graphics accelerator.
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