Revision 0.91
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Contents
1.0 Unbuffered Graphics SO-DIMM Module.......................................................................1
1.1 General Features.............................................................................................1
1.2 Labeling ...........................................................................................................1
2.0 Mechanical Outline .......................................................................................................2
3.0 Environmental Requirements........................................................................................3
4.0 Pin Assignments ...........................................................................................................4
5.0 Graphics SO-DIMM Block Diagram ..............................................................................5
6.0 Address Translation......................................................................................................9
6.1 Configuration....................................................................................................9
6.2 Default Parameters........................................................................................10
6.3 Resistor Strapping Options............................................................................11
6.3.1 Clock Frequency and Memory Timing ..............................................11
6.3.2 CAS Latency.....................................................................................11
6.4 Serial Presence Detect EEPROM..................................................................11
7.0 Electrical Characteristics.............................................................................................12
7.1 15 nS Timing..................................................................................................12
7.2 12 nS Timing..................................................................................................12
7.3 10 nS Timing..................................................................................................13
7.4 8 nS Timing....................................................................................................13
7.5 A.C Timing Diagrams.....................................................................................14
8.0 PCB Layout Considerations........................................................................................16
8.1 Clock Routing and Chip Selects ....................................................................17
8.2 Address/Control Routing................................................................................18
8.3 Data Routing..................................................................................................19
9.0 Electrical Specifications ..............................................................................................21
9.1 SDRAM/SGRAM Component Absolute Maximum D.C. Ratings ...................21
9.2 SDRAM/SGRAM Components D.C. Operating Requirements......................21
9.3 SDRAM/SGRAM Components Absolute Maximum A.C. Operating Require-
ments21
9.4 Memory Timing ..............................................................................................22
A PCB Layout.................................................................................................................23
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