Pilz PMCprotego D.48 - Page 35

Function Description
Operating Manual PMCprotego D.48, PMCprotego D.72
1001735-EN-04
35
Timing diagram
The timing diagram shows the relationship between the ENABLE signals, the speed set-
point, the speed and the braking power, in terms of time and function. All times can be set
via parameters. The times in the timing diagram are default values.
ANALOG-IN1
ENABLE
n-set value
internal
Brake BR+
Motor speed
Internal
enable
Braking power
STO-ENABLE
Emergency braking ramp
TBRAKE0 def. 20 ms
Rampe+
TBRAKE def. 100 ms
EMRGTO
max. 5 s
VEL0
DECDIS
t
brH
t
brL
5
t
t
t
t
t
t
t
t
U
U
U
U
U
U
n
F
Fig.: Timing diagram for motor holding brake
} The speed setpoint is brought from 100ms to 0 within the internal delay time (internal
ENABLE). The emergency braking ramp DECDIS is selectable.
} The brake output BR+ switches at a speed of 5 rpm (VEL0) or after 5 s at the latest
(EMRGTO).
} The rise times (t
brH
) and fall times (t
brL
) of the motor holding brake depend on the motor
type (see motor documentation).