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STMicroelectronics STM32F407 User Manual

STMicroelectronics STM32F407
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DocID018909 Rev 11 1239/1731
RM0090 USB on-the-go full-speed (OTG_FS)
1368
Figure 388. USB peripheral-only connection
1. Use a regulator to build a bus-powered device.
34.5.1 SRP-capable peripheral
The SRP capable bit in the Global USB configuration register (SRPCAP bit in
OTG_FS_GUSBCFG) enables the OTG_FS to support the session request protocol (SRP).
In this way, it allows the remote A-device to save power by switching off V
BUS
while the USB
session is suspended.
The SRP peripheral mode program model is described in detail in the B-device session
request protocol section.
34.5.2 Peripheral states
Powered state
The V
BUS
input detects the B-Session valid voltage by which the USB peripheral is allowed
to enter the powered state (see USB2.0 par9.1). The OTG_FS then automatically connects
the DP pull-up resistor to signal full-speed device connection to the host and generates the
session request interrupt (SRQINT bit in OTG_FS_GINTSTS) to notify the powered state.
The V
BUS
input also ensures that valid V
BUS
levels are supplied by the host during USB
operations. If a drop in V
BUS
below B-session valid happens to be detected (for instance
because of a power disturbance or if the host port has been switched off), the OTG_FS
automatically disconnects and the session end detected (SEDET bit in
OTG_FS_GOTGINT) interrupt is generated to notify that the OTG_FS has exited the
powered state.
In the powered state, the OTG_FS expects to receive some reset signaling from the host.
No other USB operation is possible. When a reset signaling is received the reset detected
interrupt (USBRST in OTG_FS_GINTSTS) is generated. When the reset signaling is
complete, the enumeration done interrupt (ENUMDNE bit in OTG_FS_GINTSTS) is
generated and the OTG_FS enters the Default state.
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STMicroelectronics STM32F407 Specifications

General IconGeneral
BrandSTMicroelectronics
ModelSTM32F407
CategoryController
LanguageEnglish

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