STMicroelectronics STM32F407 User Manual

Reset and clock control for STM32F42xxx and STM32F43xxx (RCC) RM0090
180/1731 DocID018909 Rev 11
6.3.10 RCC AHB1 peripheral clock register (RCC_AHB1ENR)
Address offset: 0x30
Reset value: 0x0010 0000
Access: no wait state, word, half-word and byte access.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reser-
ved
OTGH
S
ULPIE
N
OTGH
SEN
ETHM
ACPTP
EN
ETHM
ACRXE
N
ETHM
ACTXE
N
ETHMA
CEN
Res.
DMA2D
EN
DMA2E
N
DMA1E
N
CCMDAT
ARAMEN
Res.
BKPSR
AMEN
Reserved
rw rw rw rw rw rw rw rw rw rw
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
CRCE
N
Res.
GPIOK
EN
GPIOJ
EN
GPIOIE
N
GPIOH
EN
GPIOG
EN
GPIOFE
N
GPIOEEN
GPIOD
EN
GPIOC
EN
GPIO
BEN
GPIO
AEN
rw rw rw rw rw rw rw rw rw rw rw rw
Bit 31 Reserved, must be kept at reset value.
Bit 30 OTGHSULPIEN: USB OTG HSULPI clock enable
This bit is set and cleared by software.
0: USB OTG HS ULPI clock disabled
1: USB OTG HS ULPI clock enabled
Bit 29 OTGHSEN: USB OTG HS clock enable
This bit is set and cleared by software.
0: USB OTG HS clock disabled
1: USB OTG HS clock enabled
Bit 28 ETHMACPTPEN: Ethernet PTP clock enable
This bit is set and cleared by software.
0: Ethernet PTP clock disabled
1: Ethernet PTP clock enabled
Bit 27 ETHMACRXEN: Ethernet Reception clock enable
This bit is set and cleared by software.
0: Ethernet Reception clock disabled
1: Ethernet Reception clock enabled
Bit 26 ETHMACTXEN: Ethernet Transmission clock enable
This bit is set and cleared by software.
0: Ethernet Transmission clock disabled
1: Ethernet Transmission clock enabled
Bit 25 ETHMACEN: Ethernet MAC clock enable
This bit is set and cleared by software.
0: Ethernet MAC clock disabled
1: Ethernet MAC clock enabled
Bit 24 Reserved, must be kept at reset value.
Bit 23 DMA2DEN: DMA2D clock enable
This bit is set and cleared by software.
0: DMA2D clock disabled
1: DMA2D clock enabled

STMicroelectronics STM32F407 Specifications

General

Brand	STMicroelectronics
Model	STM32F407
Category	Controller
Language	English