STMicroelectronics STM32F407 User Manual

DocID018909 Rev 11 713/1731
RM0090 Cryptographic processor (CRYP)
757
23.3 CRYP functional description
The cryptographic processor implements a Triple-DES (TDES, that also supports DES) core
and an AES cryptographic core. Section 23.3.1 and Section 23.3.2 provide details on these
cores.
Since the TDES and the AES algorithms use block ciphers, incomplete input data blocks
have to be padded prior to encryption (extra bits should be appended to the trailing end of
the data string). After decryption, the padding has to be discarded. The hardware does not
manage the padding operation, the software has to handle it.
Figure 216 shows the block diagram of the cryptographic processor.
Figure 216. Block diagram (STM32F415/417xx)
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STMicroelectronics STM32F407 Specifications

General

Brand	STMicroelectronics
Model	STM32F407
Category	Controller
Language	English