STMicroelectronics STM32F407 User Manual

Universal synchronous asynchronous receiver transmitter (USART) RM0090
996/1731 DocID018909 Rev 11
Figure 316. Reception using DMA
Error flagging and interrupt generation in multibuffer communication
In case of multibuffer communication if any error occurs during the transaction the error flag
will be asserted after the current byte. An interrupt will be generated if the interrupt enable
flag is set. For framing error, overrun error and noise flag which are asserted with RXNE in
case of single byte reception, there will be separate error flag interrupt enable bit (EIE bit in
the USART_CR3 register), which if set will issue an interrupt after the current byte with
either of these errors.
30.3.14 Hardware flow control
It is possible to control the serial data flow between 2 devices by using the nCTS input and
the nRTS output. The
Figure 317 shows how to connect 2 devices in this mode:
Figure 317. Hardware flow control between 2 USARTs
RTS and CTS flow control can be enabled independently by writing respectively RTSE and
CTSE bits to 1 (in the USART_CR3 register).
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USART 1
RX circuit
TX circuit
USART 2
TX circuit
RX circuit
RXTX
TX
RX
nCTS nRTS
nRTS
nCTS

STMicroelectronics STM32F407 Specifications

General

Brand	STMicroelectronics
Model	STM32F407
Category	Controller
Language	English