STMicroelectronics STM32F407 User Manual

Reset and clock control for STM32F42xxx and STM32F43xxx (RCC) RM0090
202/1731 DocID018909 Rev 11
6.3.22 RCC spread spectrum clock generation register (RCC_SSCGR)
Address offset: 0x80
Reset value: 0x0000 0000
Access: no wait state, word, half-word and byte access.
The spread spectrum clock generation is available only for the main PLL.
The RCC_SSCGR register must be written either before the main PLL is enabled or after
the main PLL disabled.
Note: For full details about PLL spread spectrum clock generation (SSCG) characteristics, refer to
the “Electrical characteristics” section in your device datasheet.
Bits 23:2 Reserved, must be kept at reset value.
Bit 1 LSIRDY: Internal low-speed oscillator ready
This bit is set and cleared by hardware to indicate when the internal RC 40 kHz oscillator is
stable. After the LSION bit is cleared, LSIRDY goes low after 3 LSI clock cycles.
0: LSI RC oscillator not ready
1: LSI RC oscillator ready
Bit 0 LSION: Internal low-speed oscillator enable
This bit is set and cleared by software.
0: LSI RC oscillator OFF
1: LSI RC oscillator ON
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
SSCG
EN
SPR
EAD
SEL
Reserved
INCSTEP
rw rw rw rw rw rw rw rw rw rw rw rw rw
1514131211109 8765432 1 0
INCSTEP MODPER
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bit 31 SSCGEN: Spread spectrum modulation enable
This bit is set and cleared by software.
0: Spread spectrum modulation DISABLE. (To write after clearing
CR[24]=PLLON bit)
1: Spread spectrum modulation ENABLE. (To write before setting
CR[24]=PLLON bit)
Bit 30 SPREADSEL: Spread Select
This bit is set and cleared by software.
To write before to set CR[24]=PLLON bit.
0: Center spread
1: Down spread

STMicroelectronics STM32F407 Specifications

General

Brand	STMicroelectronics
Model	STM32F407
Category	Controller
Language	English